# 918 Image Sensor Process Engineer

Email:	kreed@tkophoenix.com
Posting Date:	10/20/09
Location:	San Jose or Tokyo

Client company is a global provider of complementary metal oxide semiconductor (CMOS) imaging solutions with a portfolio of products that can be found in all the leading mobile phone and notebook computer brands.

Summary

Experienced wafer process engineer highly motivated to improve yield in particular white pixel ( hot pixel ). The ideal candidate has a strong scientific background in chemistry or physics for semiconductor wafer process, and more importantly, has a very practical manner for solving issues by seeking for root cause into actual facilities and field data. The candidate is expected to use both analytical and statistical approaches, then to lead logically to appropriate process design or recipe change. The candidate needs to understand facility limitation and productivity, and to have good communication with engineers on both the fab and design sides.

Requirements

The candidate should have 5+ years experience of process integration or defect analysis for actual wafer fab.

1. Skill of process integration for CMOS image sensors, considering chemical and physical behavior of each process step.
2. Good knowledge of equipment for manufacturing, such as diffusion furnace, CVD, metallization, etc.
3. Experience in root-cause analysis of defects caused by crystal defect and metal contamination.
4. Skill in using statistical methodology for finding appropriate corrective actions from huge production data.
5. Skill in the design of impurity profile and thickness of layers to achieve the best optical and electrical performance for image sensor.
6. Adequate English communication skills

Education

Degree of Physics or Chemistry or Electrical engineering is required.  Masters degree is preferable.

Location

Preferred location is Northern California CA offices.  Also acceptable:  Client Japan offices

Compensation

Market rate.

Source of candidates

Only from Canon or Sony